ISLPED 2018 - ISLPED 2018-INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN

Website http://www.islped.org/2018/ | Edit Freely

Category Technology/Circuits/Architecture; CAD/Systems/Software

Deadline: February 26, 2018 | Date: July 23, 2018-July 25, 2018

Venue/Country: Bellevue, Washington, USA, U.S.A

Updated: 2017-12-19 06:28:32 (GMT+9)

Call For Papers - CFP

1. Technology, Circuits, and Architecture

1.1. Technologies

Low-power technologies for device, interconnect, logic, memory, 2.5/3D, cooling, harvesting, sensors, optical, printable, biomedical, battery, and alternative energy storage devices.

1.2. Circuits

Low-power digital circuits for logic, memory, reliability, clocking, power gating, resiliency, near-threshold and sub- threshold, variability, and digital assist schemes; Low-power analog/mixed-signal circuits for wireless, RF, MEMS, AD/DA Converters, I/O, PLLs/DLLS, imaging, DC-DC converters, and analog assist schemes.

1.3. Logic and Architecture

Low-power logic and microarchitecture for SoC designs, processor cores (compute, graphics and other special purpose cores), cache, memory, arithmetic/Signal processing, cryptography, variability, asynchronous design, and non-conventional computing.

2. CAD, Systems, and Software

2.1. CAD Tools and Methodologies

CAD tools and methodologies for low-power and thermal- aware design addressing power estimation, optimization, reliability and variation impact on power, and power-down approaches at all levels of design abstraction: physical, circuit, gate, register transfer, behavior, and algorithm.

2.2. Systems and Platforms

Low-power, power-aware, and thermal-aware system design including data-center power delivery and cooling, Platforms for SoCs, embedded systems, approximate and brain-inspired computing, the Internet-of-Things (IoT), wearable computing, body-area networks, wireless sensor networks, and system-level power implications due to reliability and variability.

2.3. Software and Applications

Energy-efficient, energy-aware, and thermal-aware software and application design including scheduling and management, power optimizations through HW/SW interactions, and emerging software low-power applications.

3. Industrial Design Track

ISLPED’18 solicits papers for an “Industrial Design” track to reinforce interaction between the academic research community and industry. Industrial Design track papers have the same submission deadline as regular papers and should focus on similar topics, but are expected to provide a complementary perspective to academic research by focusing on challenges, solutions, and lessons learnt while implementing industrial-scale designs. Industrial design papers that focus on any of the topics mentioned in the tracks above are welcome.

Submissions on new topics: emerging technologies, architectures/platforms, and applications are particularly encouraged.

Technical Paper Submission Deadlines: Abstract registration by Feb 26, 2018, at 11:59pm Pacific Standard Time Full paper due by Mar 5, 2018, at 11:59pm Pacific Standard Time

Invited Talk, Panel, and Embedded Tutorial Proposals Deadline: April 16, 2018 Notification of Paper Acceptance: May 7, 2018

Submission of Camera-Ready Papers: June 4, 2018

Submissions should be full-length papers of up to 6 pages (PDF format, double-column, US letter size, using the IEEE Conference format, available at http://www.ieee.org/conferences_events/conferences/publishing/templates.html), including all illustrations, tables, references, and an abstract of no more than 250 words. Submissions must be anonymous. Submissions exceeding 6 pages or identifying the authors, either directly or through explicit references to their prior work, will be automatically rejected. More information about paper submission can be found at http://www.islped.org.

Submitted papers must describe original work that has not been published/accepted or currently under review by another journal, conference, symposium, or workshop at the same time. Accepted papers will be submitted to the IEEE Xplore Digital Library and the ACM Digital Library. ISLPED’18 will present two Best Paper Awards based on the ratings of reviewers and a panel of judges.

There will be several invited talks by industry and academic thought leaders on key issues in low power electronics and design. The Symposium may also include embedded tutorials to provide attendees with the necessary background to follow recent research results, as well as panel discussions on future directions in low power electronics and design. Proposals for invited talks, embedded tutorials, and panels should be sent by email to the ISLPED’18 Technical Program Co-Chairs, Saibal Mukhopadhyay (saibalece.gatech.edu) and Matthew Ziegler (zieglermus.ibm.com) by the deadline listed above.

Participants interested in exhibiting at the Symposium should contact the General Co-Chairs by May 1, 2018.

General Co-Chairs

Thomas Wenisch, UMichigan

twenischumich.edu

Jaydeep Kulkarni, UT Austin

jaydeepaustin.utexas.edu

Program Co-Chairs

Saibal Mukhopadhyay, Gatech

saibalece.gatech.edu

Matthew Ziegler, IBM

zieglermus.ibm.com

Publicity Chair

Jing Li, U Wisconsin jliece.wisc.edu